Junior Digital Design Engineer
NXP Semiconductors
vor 3 Tg.

NXP Semiconductors N.V. (NASDAQ : NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer.

As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets.

Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.

Job Content :

  • Support concept making & development of digital signal processing (DSP) blocks for NXP NFC products
  • Develop and improve existing DSP features
  • Specify, design and verify DSP sub-blocks for integrated circuits for NFC applications
  • Design digital blocks optimized for area, performance and power consumption
  • Interface with Analogue / HW, System, Validation and FW engineers
  • Provide support to validation team in debugging trouble reports

    Key Performance Indicators :

  • Take responsibility for sub-blocks of NFC products
  • Meet agreed individual and team goals
  • Engage, self-motivate, demonstrate a flexible and enthusiastic team player
  • Skills & Experience :

    Required :

  • Basic knowledge about digital design
  • Knowledge of at least one RTL coding language (VHDL, Verilog, System Verilog)
  • Basic knowledge of Matlab
  • Basic understanding of digital verification topics and tools
  • Very good analytical skills
  • Open to new ideas and have an creative attitude
  • Taking initiative to spot and implement improvements
  • Desirable :

  • Experience in RTL coding
  • Experience in digital verification
  • Knowledge about NFC
  • Basic understanding of analog blocks used for NFC systems
  • Qualifications :

  • Master’s / Bachelor’s Degree in Electrical / Electronic engineering
  • Interactions :

  • Internal interaction with all SMT IC development teams, system architects, RF engineers, FW engineers, local analog design experts, CAD
  • NXP offers competitive compensation. Due to Austrian law we are obliged to state the minimum gross salary according to legal regulations and for this role this amounts to EUR 43.

    000 gross. Depending on experience and education higher remuneration is possible. Moreover, we provide attractive benefits to our employees.

    We are proud to have received the Leading Employer Award 2020, which is presented exclusively only to the top 1% of employers in Austria.

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