Digital Design and Verification Engineer
IC Resources
Vienna, Wien, Austria
vor 4 Tg.

A design team in Vienna designing integrated circuits that are applied into transceiver and sensor products for industrial, medical and automotive applications is looking to hire an IC Designer mixed-signal and verification.

You will become a member of a multi-disciplinary team participating in new high volume and cost efficient opto-electronic transceiver and sensor IC research and development projects.

Job description :

  • Top-level verification of mixed-signal ASICs;
  • Development of mixed-signal ASICs with a focus on digital design;
  • Involvement not only in IC verification and design, but also in chip characterisation, validation and test development;
  • Implementation of analog and digital verification strategies, work-flows and maintaining relevant tool chains;
  • Adding expertise in advanced simulations techniques (e.g. modeling of circuit blocks) to automate and speed-up of verification tasks;
  • A first activity in this position would be the top-level design and the verification of a multi-channel detector front-end ASIC, integrating complex sensor IC functionality and digital readout capability together with a team of analog and digital IC design engineers;
  • Apart from direct IC design more general tasks will include also the introduction of new simulation and verification tools and processes to speed up simulation of mixed-signal ICs and improve verification quality;
  • Job requirements and qualifications :

  • Master Degree in Electrical Engineering, Microelectronics and Photonics, Telecommunications or Embedded Systems with multiple years of demonstrated experience;
  • Deep knowledge of the full digital ASIC design cycle with special focus on mixed-mode ASIC simulation and verification methods and their implementation during the development cycle;
  • Strong expertise in analog and digital circuit design on schematic and on layout level;
  • Strong knowledge of the following tools is mandatory : Cadence Incisive, Cadence Xcelium, Cadence Vmanager, Verilog (at least in reading), SystemVerilog (at least in reading), Cadence Virtuoso analog ASIC design flow (at least basic);
  • In depth knowledge of the following tools is advantageous : Cadence Spectre APS / XPS, Cadence ADE Assembler / Explorer / Verifier, Cadence Jasper Apps, Cadence Conformal, Mentor Modelsim, Ability to do modelling of analog blocks in Verilog-A;
  • Knowledge in design for testability and FPGA based validation;
  • Broad interest in interdisciplinary work interfacing to sensors, electronics, optics, fiber technology and communication systems;
  • English communication skills, both verbal and written, prepared to learn German and acquire German communication skills;
  • To apply, please click Apply Now and speak to Ane IC Resources

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